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Tired2 · 11-01-2010, 01:30 PM

Paul, or anyone else who might know...

I built my over current section for my "spin off" of the ReVolt I'm building... I have tested the circuit on a breadboard, and it works with my 3.3v conversion and logic. I'm at the point where I need to feed in a PWM signal and simulate an over current condition, then start toggling the reset pin to turn the drives back on.

My questions:

1) I need to toggle the pin from low to high for a small amount of time to reset the overcurrent condition... what is the ReVolt's phase relationship between PWM and the overcurrent clear signal? Also, when in the PWM's cycle do you toggle that pin, and how long does it stay high? (I imagine the time is not critical, just that the NAND has time to react)...
It is possible the reset is not PWM aligned in any meaningful way... It seems like it would work at any phase, but you might cut a duty cycle in half when it re-enables the gate drive.

2) On a related note, what have you found to be the amount of "dead time" that you leave the PWM output off for? I seem to remember reading it a few times, but I'm not sure what the final value was set to. The dead time should be long enough to let the current fall back below the threshold, but short enough to not make the motor action jerky.

Thanks.

11-01-2010, 01:30 PM	#3946 (permalink)
Tired2 EcoModding Lurker Join Date: Feb 2010 Location: Texas Posts: 7 Thanks: 3 Thanked 2 Times in 2 Posts	PWM and Current Reset question Paul, or anyone else who might know... I built my over current section for my "spin off" of the ReVolt I'm building... I have tested the circuit on a breadboard, and it works with my 3.3v conversion and logic. I'm at the point where I need to feed in a PWM signal and simulate an over current condition, then start toggling the reset pin to turn the drives back on. My questions: 1) I need to toggle the pin from low to high for a small amount of time to reset the overcurrent condition... what is the ReVolt's phase relationship between PWM and the overcurrent clear signal? Also, when in the PWM's cycle do you toggle that pin, and how long does it stay high? (I imagine the time is not critical, just that the NAND has time to react)... It is possible the reset is not PWM aligned in any meaningful way... It seems like it would work at any phase, but you might cut a duty cycle in half when it re-enables the gate drive. 2) On a related note, what have you found to be the amount of "dead time" that you leave the PWM output off for? I seem to remember reading it a few times, but I'm not sure what the final value was set to. The dead time should be long enough to let the current fall back below the threshold, but short enough to not make the motor action jerky. Thanks.