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Posted for Fran.
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Very short PWM pulses to the MOSFET gates provide minimal motor current and just generate heat. Older IGBTs are even worse, taking a long time to fully turn on. Plus the Cougar uses an optoisolator, which both delays and shortens the gate drive signal.
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If you look at the HCPL-4504 datasheet, you will see that turn on of the opto is _faster_ than turn off. So while opto does delay the the gate drive signal, it _lengthens_ it (not shortens)
Also notice that as temperature of the opto increases, the turn on remains relatively constant, but turn off slows down. So with higher temperature minimum high pulse (on) to the FETs stretches.
A PI loop controls current by controlling pulse width. This loop will set the correct PWM to make the requested current. You can make the current reference jump from zero (foot of gas) to 10A minimum or so. This approach would be far less sensitive to motor resistance and battery pack voltage than a minimum PWM type parameter.
In any case we wanted to avoid the behavior of the Curtis. There minimum pulse width (on time) is enforced. That resulted in jerky starts (particularly with low resistance motors) where initial current was high until some RPM was built up and the motor would generate counter EMF. The solution was to drop the switching frequency when first applying pulses. The side effect is the well known Curtis whine. This is something we wanted to avoid.
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The Cougar firmware might also do a better job with minimum off time. If the motor controller is estimating 98%+ PWM, it should just turn on 100%. It should specifically not clamp at 510! Switching off for a few cycles is just generating heat without adding control.
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The PWM unit of the AVR is run in phase correct PWM mode.
From the AVR spec:
TCNT1 counts up from 0 to 511 then back to 0. The output is cleared (low) when TCNT1 = OCR1A (PWM value) when counting up. The output is set (set) when TCNT1 = OCR1A (PWM value) when counting down. If OCR1A is outside this range, the PWM output will not work and will be stuck in either a high or low state (undefined). So if you want the output not to flip, you need to program a special case - take away control from the PWM unit. This can become messy unless you are very careful and understand the PWM unit and chip very well.
Paul initially set the clamp value to 510 (I don't know why not 511, perhaps he had problems with the PWM unit if he allowed 511). In any case, the shortest pulse width is:
509 up - nothing
510 up - output low
511 nothing (low 1 cycle)
510 down - output high (was low 2 cycles)
So we have 2/16us low. That is 125ns.
This is shorter than the delay times of the opto. I think the pulse won't even make its way to the gates of the FETs. Even if it did, the RC constant of the gate capacitances and gate resistors would not bring the gate voltages down to anywhere near the gate threshold voltage. In short, it won't switch the FETs and the output will be pure DC.
Fran
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