|
that is a lot of pulses, given the delay changes the top speed then that seems like the problem. A dedicated atmega chip might be able to keep up with it, but not one that is monitoring injectors and displaying data on an lcd and keeping running 64 bit tallies. I would divide by 24, that is every time the vss edge changes 24 times, toggle the output pin, set pulses to a sane 5000/mi. Lunch off the existing 5v supply and intercept the vss, no oscillator required if vss is interrupt driven. @ 8mhz you have about 3000 cpu cycles to sort each edge out @ 78mph.
Or use a gear sensor and some ferrous screws on a wheel.
|