VSS signal not being recognized?

[glug]

I just did a breadboard test of circuit #1 with the 2907. I used the 1000pF cap.

The results were very similar to those from my previous TTL circuit.

On my test bench setup, the pulse rate reported from the arduino USB port tracked the sine wave frequency exactly 1:1 until 189 hz. At that point the arduino pulse rate would go no higher. And when the sine wave frequency passed 283 hz, the arduino pulse rate started to decrease.

This is a tiny breadboard with fairly short leads.

Any suggestions?

[bobski]

Try the second one? ^_^

[msc]

Either should work but I would go with the second one (fig 24). I don't know the limit but the VSS input may miss pulses that are two short. Mostly guessing on that but I know the interrupts are in use for the injector input so there may be limits to what the VSS input can detect.

The 5 volt source may be a little low for the LM2907. The max voltage is 28 volts. I didn't see a minimum voltage but the performance graphs only went down to 6 volts. I would just power it directly off the battery voltage.

It looks like the low part of the signal may not be low enough for the arduino input so it may be necessary to add a resistor to form a voltage divider on the input. The logic levels required are very low, less then 0.2 volts for low and anything over 1.0 volt is read as high.

When you get the circuit built you can toggle the output to low and read the voltage. If the low voltage is less then about 1.3 volts it can be divided down with resistors. If the low voltage level is higher then that a FET and a resistor can be used to give you a signal that goes very close to ground. A wide range of logic gates could also be used for level matching if that's what you have laying around.

Mike

[bobski]

Originally Posted by msc

VSS input may miss pulses that are two short.

Yeah, that makes sense to me. I was thinking earlier that it's like the VSS routine is missing pulses - pulses are starting and ending before the routine gets called. That would happen at very high frequencies if you were feeding it a plain square wave. Since this circuit outputs short pulses, it's easier for the guino's VSS routine to miss the detection window.

Originally Posted by msc

A wide range of logic gates could also be used for level matching if that's what you have laying around.

A flip-flop would be perfect with that frequency doubling circuit. Wire it up to toggle on each clock rising edge, then feed your circuit's output to the clock pin. The flip-flop will act as a frequency divider, so you'll get the proper number of pulses out in a nice 50% duty cycle square wave.

[glug]

Originally Posted by bobski

Try the second one? ^_^

Brilliant! :P

I just wired it up and got to 240 hz on the mpg. So it is an improvement. Now I need to follow Mike's suggestions, and tune it a bit.

Thanks!

[glug]

So, I'm a bit stuck on what I can do to improve this situation. An assumption is that lengthening the pulse duration will help with detection. I'm wondering how to do that. Halving the frequency with a flip-flop will help, but that will only get me to about 48mph - not nearly enough.

I will try increasing the supply voltage, but I'm not sure that will improve the mpguino pulse detection. There is also the gotcha of prototyping on an arduino and not having conditioned 12v to feed it. So I plan on testing it with a 9v to see whether the frequency capability can be increased. Though that does not seem to be the limitation. I eventually intend to dedicate an atmega to this, and free up the arduino. But only after it is working well.

If I had a signal generator and scope, I'd profile and document the capabiliy of the mpguino's VSS input. As Mike mentioned, that it isn't interrupt driven raises some questions about the capability. I did some testing with the arduino tone library, but the results weren't very encouraging. I need to revisit that (as well as developing better siggen capability), but it seems like a distraction from getting my mpguino working.

[msc]

I had a chance to play with an LM2907 circuit on the bench. The circuit I had laying around to play with was the circuit (fig. 24) right out of the app note with the addition of some input protection components and a 30K load.

I tested the circuit as low as 3 volts so 5 volt operation should be fine.

Being careful to adjust the input signal so there were zero crossings to detect I was able to detect a signal as low as 6mv P-P. The ability to detect the small signal as the speed approaches zero is the prime reason for using this part.

Some voltages I measured for output high and low at different excitation voltages: (5V exc, low 0.84V, high 3.08V), (12V exc, low 2.44V, high 8.50V), (14V exc, low 2.94V, high 9.98V). I expect these levels can vary a bit form one chip to the next so your mileage may vary.

From the data sheet for the ATmega the logic thresholds for 5V operation are max voltage for low is 0.3V and the min voltage for high is 0.6V. So this confirms your problem is a miss match of logic levels. You just need to get the low logic level low enough for the ATmega chip to see it as low.

The following suggestions assume you are powering the LM2907 with 5 volts.

A simple voltage divider of about 3:1 or 4:1 on the output of the LM2907 should do the job. A 10K and 20K resistor would be about right for a 3:1 divider. A 10K and 30K resistor will give you a 4:1 divider. Be sure to take into account or remove the input pull down resistor if present on the VSS input.

Another approach would be to use a pull up resistor on the VSS input and a FET to switch it to ground. The Gate input of the FET would be driven by the LM2907 output. You would want to select a FET that is 3.3V logic compatible, the gate threshold voltage should be around 2.0 to 2.5 volts.

A logic chip from the 74AHCT family would work as well. 74AHCT04 inverter would be a good choice but AND, NAND, OR, NOR and others can be used by tying other inputs high or low as appropriate. The AHCT logic chips have input thresholds of 2.0V for high and 0.8V for low. The output levels are 4.5V for high and 0.1V for low.

Mike

[glug]

Mike, thank you for the help!

I see now the importance of the logic output level - I hadn't realized it might vary with input level.

I mocked up the voltage divider and did some bench tests. However, my sound card signal generator is voltage limited. The a/c voltage does not increase like the actual reluctor.

Even with the divider, I was still limited to about 240hz. And if I push the input frequency higher, the mpguino reported pulse rate rapidly drops.

So I'm still puzzled. Are my peak pulses too low, my lows too high, or is there another issue with pulse detection at that rate, perhaps software?

I may try and go back to using a spare arduino to generate logic pulses in order to verify that the mpguino can actually detect at the necessary rate.

[bobski]

Have you tried a flip-flop yet? The MPGuino uses a polling strategy to watch the VSS input, meaning it only checks the status of the input at regular intervals. If a pulse from your circuit starts and ends before that interval comes around in code execution, the MPGuino will miss the pulse. The shorter the pulse, the easier it is for the code to miss it. A flip-flop doesn't have any such limitation and will convert the signal to a 1/2 frequency, 50% duty cycle square wave, very much like a standard switching VSS.

[dcb]

Originally Posted by bobski

The MPGuino uses a polling strategy to watch the VSS input, meaning it only checks the status of the input at regular intervals...

Why are you even commenting on the mpguino?!? It is painfully obvious you don't know how it works.