Paul & Sabrina's cheap DIY 144v motor controller

[blackpanther-st]

That sounds right to me, if after "after" the comparator, then it should be isolated by the comparator and not be able to affect the signal at your current transducer.

I am no expert on this though; I am going to have plenty of questions of my own as I attempt my own controller. I am hoping that maybe you can stop by and help me with a few questions once I start a thread for it.

[MPaulHolmes]

Oh heck ya! I'd love to help in any way I can!

[blackpanther-st]

open source ROCKS!

[MPaulHolmes]

Heck yes it does...

I got the edit! Thanks, DCB!!!!

[dcb]

oops, you have to set the right channel in the timer ISR, not the adcComplete isr. Made tweaks to timer and adc isr in the outline above.

EDIT: and I should have said reti, not iret, though I'm not %100 on how you get there from C, so just skip the block I recon.

[dcb]

ok, that timer1 function takes 49 cycles (3.062us @ 16mhz)

[MPaulHolmes]

Holy hanna montana that's fast! Almost as fast as my 45 microseconds... Wait... nevermind.

Hey, I finished entering the directions for etching the power section just now. It's in Open Office Spreadsheet. I got to get me some emails to send it to! Note: I haven't done the drilling coordinates yet. This file only has the etching directions for one of the versions. I wanted to try 2 versions, just to see which one blows up faster. hahaha! Just kidding you guys (about the blowing up, not the 2 versions).

[dcb]

Originally Posted by MPaulHolmes

Holy hanna montana that's fast!

Well, it is just scheduling the adc conversions and returning. The adc conversions happen in the hardware and the main loop will march forward till the adc complete interrupt says ("OK, I read that last channel").

The top of the main loop halts interrupts briefly, makes its own copies of the interesting variables, then re-enables interrupts. It can't use the global versions directly because they could get updated in the middle of a computation.

Max ADC rate is about 10khz, and there is only one channel at a time, so a lot of the timer1 calls will auto-return, but it is what it is and the bulk of the processing (32 bit math?) can happen in the main loop outside of interrupts.

[dlaing]

dcb,
I really like your code for the ISR's.
It looks like Paul has the ADC clock at 1MHz (which means he should only use 8 bits of the result). Other than the first result the ADC takes 13 ADC cycles, or about 13us. So we can read the current for every ISR with plenty of time for everything else.

[charlie_fd]

Originally Posted by dcb

...

Max ADC rate is about 10khz, and there is only one channel at a time, so a lot of the timer1 calls will auto-return, but it is what it is and the bulk of the processing (32 bit math?) can happen in the main loop outside of interrupts.
...

The is smth. I do not understand here ... ADC will take 13 ADC clocks, we have a 1MHz clock for adc (we loose some precision, 2.5lsb out of 10bit if i'm not mistaken) that means 77kHz max. ADC rate! There will never be be an "auto-return" of the timer1 ISR at 16khz on the grounds of unfinished conversion if we only convert 1 channel at a time...

What am I missing?

L.E.: Doh! Next time i will scroll down before replying ...dlaing had the same observation 5 hours before me